Designing an integrated circuit (IC) has been made considerably easier by the availability of electronic design automation (EDA) tools. An IC can include billions of devices, and can comprise ten to sixteen layers or more of conductor material. EDA tools allow a designer to describe an integrated circuit based on its desired behavior, and then transform that behavioral description into a set of geometric shapes corresponding to the devices for each of the layers, the set of shapes being called a layout. Included among the stages of designing an IC, devices are placed into a floor plan. The devices are then interconnected together with wires, busses, etc. made of a conductor material.
It is often desirable during many stages of an IC design and verification process to visualize how devices and wires are actually laid out in the various layers of the IC. Many EDA tools include a graphical user interface (GUI) for allowing a designer to do this. However, in designs with ten or more layers, and billions of devices and wires, many challenges can arise when a GUI is trying to display portions of designs with devices and wires overlapping each other at many points in the various layers.